Webcast: Accelerate Your Video Design with an FPGA and IP Cores

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Webcast: Accelerate Your Video Design with an FPGA and IP Cores View Now—On-Demand (19 minutes) What do you do when your product requires fast turnaround for a simple display? Or what alternative do you have when your end product demands higher throughput with advanced video processing, compared to the one that only needs a simple display? Watch this webcast to find out how FPGAs can offer you a customizable solution and quick intellectual property (IP) integration to build your video design faster – whether you need simple format conversion or advanced digital video processing. You'll learn: What a video processing path involves and the video processing functions required How FPGAs can meet the performance requirements of high-definition video processing How to use the Avalon® Memory-Mapped and Avalon Streaming protocols to integrate custom IP blocks How to get your FPGA video designs done faster with the help of reference designs Presenter: Richard Yang,  Sr. Product Marketing Engineer         As a subscriber to the "Product Announcements and Updates" email list, we will notify you about new products, events and other updates. To update your email preferences and contact information, or subscribe/unsubscribe from Altera email updates and enewsletters please visit our Email Subscription Center. Connect with Altera:                   Copyright© 1995-2011 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.